M32C80 Datasheet, PDF (330/352 Pages) Renesas Technology Corp – 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES

M32C/80 Group
24. Precautions (Clock Generation Circuit)
24.4.3 PLL Frequency Synthesizer
Stabilize supply voltage to meet the power supply standard when using the PLL frequency synthesizer.
Table 24.3 Power Supply Ripple
Symbol
Parameter
f(ripple)
Power Supply Ripple Tolerable Frequency (VCC1)
VP-P(ripple) Power Supply Ripple Voltage Fluctuation Range
VCC(| V/ T|) Power Supply Ripple Voltage Fluctuation Rate
VCC1=5V
VCC1=3.3V
VCC1=5V
VCC1=3.3V
Standard
Unit
Min. Typ. Max.
10 kHz
0.5 V
0.3 V
1 V/ms
0.3 V/ms
f(ripple)
Power Supply Ripple Tolerable Frequency
(VCC1)
Vp-p(ripple)
Power Supply Ripple Amplitude
Voltage
VCC1
Figure 24.2 Power Supply Fluctuation Timing
f(ripple)
Vp-p(ripple)
24.4.4 External Clock
Do not stop an external clock running if the main clock is selected as the CPU clock while the external
clock is applied to the XIN pin.
Do not set the CM05 bit in the CM0 register to "1" (main clock stopped) while the external clock input is
used for the CPU clock.
24.4.5 Clock Divide Ratio
Set the PM12 bit in the PM1 register to "0" (no wait state) when changing the MCD4 to MCD0 bit settings
in the MCD register.
24.4.6 Power Consumption Control
Stabilize the main clock, sub clock or PLL clock to switch the CPU clock source to each clock.
24.4.6.1 Wait Mode
When entering wait mode while the CM02 bit in the CM0 register is set to "1" (peripheral function stop
in wait mode), set the MCD4 to MCD0 bits in the MCD register to maintain the 10-MHz CPU clock
frequency or less.
When entering wait mode, the instruction queue reads ahead to instructions following the WAIT in-
struction, and the program stops. Write at least 4 NOP instructions after the WAIT instruction.
Rev. 1.00 Nov. 01, 2005 ^{Page 311} of 330
REJ09B0271-0100