M32C80 Datasheet, PDF (28/352 Pages) Renesas Technology Corp – 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES

M32C/80 Group
1. Overview
1.6 Pin Description
Table 1.4 Pin Description
Signal name Pin name I/O type
Power supply _{VCC1, VCC2 I}
VSS
Analog power AVCC
I
supply input AVSS
____________
Reset input RESET
I
Supply
voltage
-
VCC1
VCC1
CNVSS
External data
bus width
select input
Bus control
pins
CNVSS
BYTE
D0 to D7
D8 to D15
I
VCC1
I
VCC1
I/O VCC2
I/O VCC2
A0 to A22
______
A23
A0/D0 to
A7/D7
O
VCC2
O
VCC2
I/O VCC2
A8/D8 to
I/O
A15/D15
______
______
CS0 to CS3 O
________ ______
WRL/WR
O
_________ ________
WRH/BHE
_____
RD
VCC2
VCC2
VCC2
ALE
__________
HOLD
__________
HLDA
________
RDY
O
VCC2
I
VCC2
O
VCC2
I
VCC2
Description
Apply 3.0 to 5.5 V to both VCC1 and VCC2 pins. Apply 0 V to the
VSS pin. VCC1 ≥ VCC2(1)
Supplies power for the A/D converter. Connect the AVCC pin to
VCC1 and the AVSS pin to VSS
The microcomputer is in a reset state when "L" is applied to the
____________
RESET pin
Connect this pin to VCC1
Switches the data bus in external memory space 3. The data
bus is 16 bits long when the this pin is held "L" and 8 bits long
when the this pin is held "H". Set it to either one.
Inputs and outputs data (D0 to D7) while accessing an external
memory space with separate bus
Inputs and outputs data (D8 to D15) while accessing an external
memory space with 16-bit separate bus
Outputs address bits (A0 to A22)
Outputs inversed address bit A23
Inputs and outputs data (D0 to D7) and outputs 8 low-order
address bits (A0 to A7) by time-sharing while accessing an
external memory space with multiplexed bus
Inputs and outputs data (D8 to D15) and outputs 8 middle-order
address bits (A8 to A15) by time-sharing while accessing an
external memory space with multiplexed bus
______
______
Output CS0 to CS3 that are chip-select signals specifying an external space
_______ ________ ______ ________
_____
_______
________
Outputs WRL, WRH, (WR, BHE) and RD signals. WRL and WRH
______
_______
can be switched with WR and BHE by program
________ _________
_____
WRL, WRH and RD are selected:
If external data bus is 16 bits wide, data is writtenn to an even
_______
address when WRL is held "L".
________
Data is written to an odd address when WRH is held "L".
_____
Data is read when RD is held "L".
______ ________
_____
WR, BHE and RD are selected
______
Data is written to external memory space when WR is held "L".
_____
Data is read when RD is held "L".
________
An odd address is accessed when BHE is held "L".
______ ________
_____
Select WR, BHE and RD for an external 8-bit data bus
ALE is a signal latching address
__________
The microcomputer is placed in a hold state while the HOLD pin
is held "L"
Outputs an "L" siganl while the microcomputer is placed in a hold state
Bus is placed in a wait state while the RDY pin is held "L"
I: Input O: Output I/O: Input and output
NOTE:
1. In this manual, hereafter, VCC refers to VCC1 unless otherwise noted.
Rev. 1.00 Nov. 01, 2005 ^{page 9} of 330
REJ09B0271-0100