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M32C80 Datasheet, PDF (80/352 Pages) Renesas Technology Corp – 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES
M32C/80 Group
8. Clock Generation Circuit
Oscillation Stop Detection Register(1)
b7 b6 b5 b4 b3 b2 b1 b0
00 00
Symbol
CM2
Address
000D16
After Reset
0016
Bit
Symbol
CM20
Bit Name
Function
RW
Oscillation Stop Detection 0: Disables oscillation stop detect function
Enable Bit(2)
1: Enables oscillation stop detect function RW
CM21
CPU Clock
Select Bit 2(3, 4)
0: Clock selected by the CM17 bit
1: On-chip oscillator clock
RW
Oscillation Stop Detection 0: Main clock does not stop
CM22 Flag(5)
1: Detects a main clock stop
RW
CM23 Main Clock Monitor
Flag(6)
0: Main clock oscillates
1: Main clock stops
RO
(b7 - b4) Reserved Bit
Set to "0"
RW
NOTES:
1. Rewrite the CM2 register after the PRC0 bit in the PRCR register is set to "1" (write enabled).
2. If the PM21 bit in the PM2 register is set to "1" (clock change disabled), the CM20 bit setting does not
change when written.
3. When a main clock oscillation stop is detected while the CM20 bit is set to "1", the CM21 bit is set to "1".
Although the main clock starts oscillating, the CM21 bit is not set to "0". If the main clock is used as a
CPU clock source after the main clock resumes oscillating, set the CM21 bit to "0" by program.
4. When the CM20 bit is set to "1" and the CM22 bit is set to "1", do not set the CM21 bit to "0".
5. When a main clock stop is detected, the CM22 bit is set to "1". The CM22 bit can only be set to "0", not
"1", by program.
If the CM22 bit is set to "0" by program while the main clock stops, the CM22 bit cannot be set to "1"
until the next main clock stop is detected.
6. Determine the main clock state by reading the CM23 bit several times after the oscillation stop
detection interrupt is generated.
Figure 8.5 CM2 Register
Rev. 1.00 Nov. 01, 2005 Page 61 of 330
REJ09B0271-0100