M32C80 Datasheet, PDF (119/352 Pages) Renesas Technology Corp – 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES

M32C/80 Group
10. Interrupts
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10.8 NMI Interrupt
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The NMI interrupt⁽¹⁾ occurs when a signal applied to the NMI pin changes from a high-level ("H") signal to a
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low-level ("L") signal. The NMI interrupt is a non-maskable interrupt. Although the P85/NMI pin is used as
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the NMI interrupt input pin, the P8_5 bit in the P8 register indicates the input level for this pin.
NOTE:
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1. When the NMI interrupt is not used, connect the NMI pin to VCC1 via a resistor. Because the NMI
interrupt cannot be ignored, the pin must be connected.
10.9 Key Input Interrupt
Key input interrupt request is generated when one of the signals applied to the P104 to P107 pins in input
mode is on the falling edge. The key input interrupt can be also used as key-on wake-up function to exit wait
or stop mode. To use the key input interrupt, do not use P104 to P107 as A/D input ports. Figure 10.11
shows a block diagram of the key input interrupt. When an "L" signal is applied to any pins in input mode,
signals applied to other pins are not detected as an interrupt request signal.
When the PSC_7 bit in the PSC register⁽²⁾ is set to "1" (key input interrupt disabled), no key input interrupt
occurs regardless of interrupt control register settings. When the PSC_7 bit is set to "1", no input from a
port pin is available even when in input mode.
NOTE:
2. Refer to 22. Programmable I/O Ports about the PSC register.
Pull-up
Transistor
PU31 Bit in the
PUR3 Register
PD10_7 Bit
PSC_7 Bit PD10_7 Bit
P107/KI3
P106/KI2
Pull-up
Transistor
Pull-up
Transistor
PD10_6 Bit
PD10_5 Bit
P105/KI1
P104/KI0
Pull-up
Transistor
PD10_4 Bit
KUPIC Register
Interrupt Control
Circuit
Key Input Interrupt
Request
Figure 10.11 Key Input Interrupt
To use the intelligent I/O interrupt as a source to activate DMAC II, set the IRLT bit in the IIOiIE register to
"0" (interrupt request is used for DMAC, DMAC II) and enable an interrupt request source for the IIOiIE
register.
Rev. 1.00 Nov. 01, 2005 Page 100 of 330
REJ09B0271-0100