M32C80 Datasheet, PDF (228/352 Pages) Renesas Technology Corp – 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES

M32C/80 Group
16. Serial I/O (Special Function)
To generate the internal clock synchronized with the external clock, set the SU1HIM bit in the UiSMR2
register (i=0 to 4) and the SCLKDIV bit in the UiSMR register to values shown in Table 16.29. Then apply
________
a trigger signal to the CTSi pin. Either the same clock cycle as the external clock or external clock divided
by two can be selected as the transfer clock. The SCLKSTPB bit in the UiC1 register controls the transfer
clock. Set the SCLKSTPB bit accordingly, to start or stop the transfer clock during an external clock
operation. Figure 16.27 shows an example of the clock-divided synchronous function.
Table 16.29 Clock-Divided Synchronous Function Select
SCLKDIV Bit in
UiSMR Register
0
0
1
i=0 to 4
SU1HIM Bit in
Clock-Divided Synchronous Function
UiSMR2 Register
0
Not synchronized
1
Same division as the external clock
0 or 1
Same division as the external clock
divided by 2
Example of Waveform
-
A in Figure 16.27
B in Figure 16.27
External Clock
from the CLKi Pin
Trigger Signal
from the CTSi Pin
Transfer Clock
A
TxDi
12345678
12345678
Transfer Clock
B
TxDi
1
2
3
4
i=0 to 4
A, B: See Table 16.29.
The SCLKSTPB bit in the UiC1 register
stops the clock
5
6
7
8
Figure 16.27 Clock-Divided Synchronous Function
Rev. 1.00 Nov. 01, 2005 Page 209 of 330
REJ09B0271-0100