M32C80 Datasheet, PDF (148/352 Pages) Renesas Technology Corp – 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES

M32C/80 Group
14. Timer
TB0IN
TB1IN
TB2IN
TB3IN
TB4IN
TB5IN
Clock prescaler
XCIN
Set the CPSR bit in the
CPSRF register to "1"
1/32
Reset
f1 f8 f2n fC32 ^{Timer B2 overflow or underflow signal}
(to a count source of Timer A)
TCK1 to TCK0
00
01
10
11
Noise
filter
00 ^{TCK1 and TCK0}
01
10
11
Noise
filter
00 ^{TCK1 and TCK0}
01
10
11
Noise
filter
1
0 _TCK1
1
0 _TCK1
1
0
TCK1
00: Timer mode
10: Pulse width measurement mode
TMOD1 and TMOD0
Timer B0
01:Event counter mode
00: Timer mode
10: Pulse width measurement mode
TMOD1 and TMOD0
Timer B1
01:Event counter mode
00: Timer mode
10: Pulse width measurement mode
TMOD1 and TMOD0
Timer B2
01:Event counter mode
TCK1 and TCK0
00
01
10
11
Noise
filter
TCK1 and TCK0
00
01
10
11
Noise
filter
TCK1 and TCK0
00
01
10
11
Noise
filter
1
0
TCK1
1
0
TCK1
1
0 _TCK1
00: Timer mode
10: Pulse width measurement mode
TMOD1 and TMOD0
Timer B3
01:Event counter mode
00: Timer mode
10: Pulse width measurement mode
TMOD1 and TMOD0
Timer B4
01:Event counter mode
00: Timer mode
10: Pulse width measurement mode
TMOD1 and TMOD0
Timer B5
01:Event counter mode
CST: Bit in the TCSPR Register
TCK1 and TCK0, TMOD1 and TMOD0: Bits in the TBiMR Register (i=0 to 5)
fC32
Timer B0 interrupt
Timer B1 interrupt
Timer B2 interrupt
Timer B3 interrupt
Timer B4 interrupt
Timer B5 interrupt
Figure 14.2 Timer B Configuration
Rev. 1.00 Nov. 01, 2005 Page 129 of 330
REJ09B0271-0100