M32C80 Datasheet, PDF (181/352 Pages) Renesas Technology Corp – 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES

M32C/80 Group
15. Three-Phase Motor Control Timer Functions
Timer B2 Interrupt Generation Frequency Set Counter^{(1, 2, 3)}
b7
b0
Symbol
Address
ICTB2
030D16
After Reset
Indeterminate
Function
When the INV01 bit is set to "0" (the ICTB2 counter
increments whenever the timer B2 counter underflows) and
the setting value is n, the timer B2 interrupt is generated
every nth time timer B2 counter underflow occurs.
When the INV01 bit is set to "1" (the INV00 bit selects
count timing of the ICTB2 counter) and setting value is
n, the timer B2 interrupt is generated every nth time
timer B2 counter underflow meeting the condition
selected in the INV00 bit occurs.
Setting Range RW
1 to 15
WO
Nothing is assigned. When write, set to "0".
NOTES:
1. Use the MOV instruction to set the ICTB2 register.
2. If the INV01 bit in the INVC0 register is set to "1", set the ICTB2 register in the TABSR register when
the TB2S bit is set to "0" (timer B2 counter stopped).
If the INV01 bit is set to "0" and the TB2S bit to "1" (timer B2 counter start), do not set the ICTB2
register when the timer B2 counter underflows.
3. If the INV00 bit in the INVC0 register is set to "1", the first interrupt is generated when the timer B2
counter underflows n-1 times, n being the value set in the ICTB2 counter. Subsequent interrupts are
generated every n times the timer B2 counter underflows.
Timer Ai, Ai-1 Register (i=1, 2, 4)(1, ^{2, 3, 4, 5, 6)}
b15
b8 b7
b0 Symbol
Address
After Reset
TA1, TA2, TA4
034916 - 034816, 034B16 - 034A16, 034F16 - 034E16 Indeterminate
TA11, TA21, TA41 030316 - 030216, 030516 - 030416, 030716 - 030616 Indeterminate
Function
Setting Range RW
If setting value is n, the timer stops when the nth count
source is counted after a start trigger is generated.
Positive phase changes to negative phase, and vice
000016 to FFFF16 WO
versa, when the timers A1, A2 and A4 stop.
NOTES:
1. Use a 16-bit data for read and write.
2. If the TAi or TAi1 register is set to "000016", no counter starts and no timer Ai interrupt is generated.
3. Use the MOV instruction to set the TAi and TAi1 registers.
4. When the INV15 bit in the INVC1 register is set to "0" (dead timer enabled), phase switches from an
inactive level to an active level when the dead time timer stops.
5. When the INV11 bit in the INVC1 register is set to "0" (three-phase mode 0), the value of the TAi
register is transferred to the reload register by a timer Ai start trigger.
When the INV11 bit is set to "1" (three-phase mode 1), the value of the TAi1 register is first
transferred to the reload register by a timer Ai start trigger. Then, the value of the TAi register is
transferred by the next trigger. The values of the TAi1 and TAi registers are transferred alternately to
the reload register with every timer Ai start trigger.
6. Do not write to these registers when the timer B2 counter underflows.
Timer B2 Special Mode Register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
TB2SC
Address
035E16
After Reset
XXXX XXX02
Bit
Symbol
Bit Name
Function
RW
0: Timer B2 counter underflows
PWCON
Timer B2 Reload Timing
Switching Bit⁽¹⁾
1: Timer A output in odd-number
RW
times
Nothing is assigned. When write, set to "0".
When read, its content is "0."
NOTE:
1. Set the PWCON bit to "0" when setting the INV11 bit to "0" (three-phase mode 0) or the INV06 bit to
"1" (sawtooth wave modulation mode).
Figure 15.5 ICTB2 Register, TA1, TA2, TA4, TA11, TA21 and TA41 Registers, TB2SC Register
Rev. 1.00 Nov. 01, 2005 Page 162 of 330
REJ09B0271-0100