M32C80 Datasheet, PDF (170/352 Pages) Renesas Technology Corp – 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES

M32C/80 Group
14. Timer (Timer B)
14.2.2 Event Counter Mode
In event counter mode, the timer counts how many external signals are applied or how many times
another timer overflows and underflows. (See Table 14.10) Figure 14.21 shows the TBiMR register (i=0
to 5) in event counter mode.
Table 14.10 Event Counter Mode Specifications
Item
Specification
Count Source
• External signal applied to the TBiIN pin (i = 0 to 5) (valid edge can be selected by
program)
• TBj overflow or underflow signal (j=i-1, except j=2 when i=0, j=5 when i=3)
Counting Operation
• The timer decrements a counter value
When the timer counter underflows, content of the reload register is reloaded into the
count register to continue counting
Divide Ratio
1/(n+1)
n : setting value of the TBi register 000016 to FFFF16
Counter Start Condition
The TBiS bits in the TABSR and TBSR register are set to "1" (starts counting)
Counter Stop Condition
The TBiS bit is set to "0" (stops counting)
Interrupt Request Generation Timing The timer counter underflows
TBiIN Pin Function
Programmable I/O port or count source input
Read from Timer
The TBi register indicates counter value
Write to Timer
• When the timer counter stops, the value written to the TBi register is also written to
both reload register and counter
• While counting, the value written to the TBi register is written to the reload register
(It is transferred to the counter at the next reload timing)
Rev. 1.00 Nov. 01, 2005 Page 151 of 330
REJ09B0271-0100