M32C80 Datasheet, PDF (277/352 Pages) Renesas Technology Corp – 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES

M32C/80 Group
21. Intelligent I/O (Communication Function)
When f8, f2n or External Clock is Selected as the Communication clock
(Communication Units 0 and 1)
Write to the GiTB register
f8, f2n or
"1"
External Clock _"0"
"1"
TE Bit
"0"
Transfer Clock
ISTxDi Pin Output
(transmit data)
SIOiTR Bit when IRS=0 _"1"
(no data in the
GiTB register)
"0"
SIOiTR Bit when IRS=1 ^"1"
(transmission
completed)
"0"
ISRxDi Pin Input
(received data)
"1"
SIOiRR Bit
"0"
Bit 0
Bit 1
Bit 2
Write "0" by program
if setting to "0"
Bit 0
Bit 1
Bit 2
Bit 6
Bit7
Bit 6
Write "0" by program
if setting to "0"
Bit7
Write "0" by program if setting to "0"
The above applies under the following conditions:
• The CKDIR bit in the GiMR register is set to "0" (internal clock)
• The CCS1 and CCS0 bits or the CCS3 and CCS2 bits in the CCS register
are set to "102" or "112"
• The UFORM bit in the GiMR register is set to "0" (LSB first)
SIOiTR bit: Bit in the IIOjIR register (j=1, 3)
SIOiRR bit: Bit in the IIOkIR register (k=0, 2)
IRS bit: Bit in the GiMR register
TE bit: Bit in the GiCR register
i=0, 1
Figure 21.12 Transmit and Receive Operation
Rev. 1.00 Nov. 01, 2005 ^{Page 258} of 330
REJ09B0271-0100