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M32C80 Datasheet, PDF (337/352 Pages) Renesas Technology Corp – 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES
M32C/80 Group
24. Precautions (Timer)
24.8 Timer
24.8.1 Timers A and B
Timers stop after reset. Set the TAiS(i=0 to 4) bit or TBjS(j=0 to 5) bit in the TABSR register or TBSR
register to "1" (starts counting) after setting operating mode, count source and counter.
The following registers and bits must be set while the TAiS bit or TBjS bit is set to "0" (stops counting).
• TAiMR, TBjMR register
• TAi, TBj register
• UDF register
• TAZIE, TA0TGL, TA0TGH bits in the ONSF register
• TRGSR register
24.8.2 Timer A
The TA1OUT, TA2OUT and TA4OUT pins are placed in high-impedance states when a low-level ("L") signal
_______
is applied to the NMI pin while the INV03 and INV02 bits in the INVC0 register are set to "112" (forced
_______
cutoff of the three-phase output by an "L" signal applied to the NMI pin).
24.8.2.1 Timer A (Timer Mode)
• The TAiS bit (i=0 to 4) in the TABSR register is set to "0" (stops counting) after reset. Set the TAiS
bit to "1" (starts counting) after selecting an operating mode and setting the TAi register.
• The TAi register indicates the counter value during counting at any given time. However, the
counter is "FFFF16" when reloading. The setting value can be read after setting the TAi register
while the counter stops and before the counter starts counting.
24.8.2.2 Timer A (Event Counter Mode)
• The TAiS (i=0 to 4) bit in the TABSR register is set to "0" (stops counting) after reset. Set the TAiS
bit to "1" (starts counting) after selecting an operating mode and setting the TAi register.
• The TAi register indicates the counter values during counting at any given time. However, the
counter will be "FFFF16" during underflow and "000016" during overflow, when reloading. The set-
ting value can be read after setting the TAi register while the counter stops and before the counter
starts counting.
Rev. 1.00 Nov. 01, 2005 Page 318 of 330
REJ09B0271-0100