M32C80 Datasheet, PDF (122/352 Pages) Renesas Technology Corp – 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES

M32C/80 Group
10. Interrupts
Interrupt Request Register
b7 b6 b5 b4 b3 b2 b1 b0
00 0
Symbol
IIO0IR to IIO4IR
Address
See below
After Reset
0000 000X2
Bit
Symbol
Function
RW
Nothing is assigned. When write, set to "0".
(b0) When read, its content is indeterminate.
Reserved bit. Set to "0".
RW
(b3 - b1) ^{When read, its content is indeterminate.}
(Note 1)
0: Requests no interrupt
1: Requests an interrupt⁽²⁾
RW
0: Requests no interrupt
(Note 1) _{1: Requests an interrupt(2)}
RW
(Note 1)
0: Requests no interrupt
1: Requests an interrupt⁽²⁾
RW
(Note 1)
0: Requests no interrupt
1: Requests an interrupt⁽²⁾
RW
NOTES:
1. See table below for bit symbols.
2. Only "0" can be set (nothing is changed even if "1" is set).
Bit Symbols for the Interrupt Request Register
Symbol Address Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
IIO0IR 00A016
-
-
SIO0RR G0RIR
-
IIO1IR 00A116
-
-
SIO0TR G0TOR
-
IIO2IR 00A216
-
-
SIO1RR G1RIR
-
IIO3IR 00A316
-
-
SIO1TR G1TOR
-
IIO4IR 00A416 SRT0R SRT1R
-
-
-
Bit 2
-
-
-
-
-
Bit 1
-
-
-
-
-
Bit 0
-
-
-
-
-
SIOiRR: Intelligent I/O Communication Unit i Receive Interrupt Request
SIOiTR: Intelligent I/O Communication Unit i Transmit Interrupt Request
GiTOR: Intelligent I/O Communication Unit i HDLC Data Processing Function Interrupt Request (TO: Output to Transmit)
GiRIR: Intelligent I/O Communication Unit i HDLC Data Processing Function Interrupt Request (RI: Input to Receive)
SRTiR: Intelligent I/O Special Communication Function Interrupt Request
-: Reserved Bit. Set to "0"
i=0, 1
Figure 10.14 IIO0IR to IIO4IR Registers
Rev. 1.00 Nov. 01, 2005 Page 103 of 330
REJ09B0271-0100