M32C80 Datasheet, PDF (105/352 Pages) Renesas Technology Corp – 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES

M32C/80 Group
10. Interrupts
10.5.1 Fixed Vector Tables
The fixed vector tables are allocated addresses FFFFDC16 to FFFFFF16. Table 10.1 lists the fixed vector
tables.
Table 10.1 Fixed Vector Table
Interrupt
Generated by
Undefined
Instruction
Overflow
Vector Addresses
Low address to High address
FFFFDC16 to FFFFDF16
FFFFE016 to FFFFE316
Remarks
Reference
M32C/80 Series Software
Manual
BRK Instruction FFFFE416 to FFFFE716
Address Match FFFFE816 to FFFFEB16
-
FFFFEC16 to FFFFEF16
Watchdog Timer FFFFF016 to FFFFF316
-
NMI
Reset
FFFFF416 to FFFFF716
FFFFF816 to FFFFFB16
FFFFFC16 to FFFFFF16
If the content of address FFFFE716
is FF16, a program is executed
from the address stored into
software interrupt number 0 in the
relocatable vector table
Reserved space
These addresses are used for the
watchdog timer interrupt and
oscillation stop detection interrupt
Reserved space
Reset,
Clock Generation Circuit,
Watchdog Timer
Reset
10.5.2 Relocatable Vector Tables
The relocatable vector tables occupy 256 bytes from the starting address set in the INTB register. Table
10.2 lists the relocatable vector tables.
Set an even address as the starting address of the vector table set in the INTB register to increase
interrupt sequence execution rate.
Rev. 1.00 Nov. 01, 2005 Page 86 of 330
REJ09B0271-0100