M32C80 Datasheet, PDF (210/352 Pages) Renesas Technology Corp – 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES

M32C/80 Group
16. Serial I/O (Special Function)
SDAi
SCLi
CLKi
(Note1)
Noise
Filter
Timer
I/O
UARTi
IICM _{1 Delay Circuit}
0
SDHI _ALS
DQ
Arbitration
T
1 ^IICM
0
Detects Start Condition
Detects Stop Condition
To DMA
Transmit Register
UARTi
Receive Register
UARTi
S Bus
Q
R
busy
IICM=0 or IICM2=1
IICM=1 and
IICM2=0
IICM=0 or
IICM2=1
IICM=1 and
IICM2=0
UARTi Transmission
NACK Interrupt
Request
To DMA
UARTi Reception
ACK Interrupt Request
DMA Request
NACK
Noise
Filter
Noise
Filter
Falling edge
detect
(Note 1)
I/O
UARTi
IICM=1
1 ^IICM
0
DQ
LSYN bit
T
R Data Register
DQ
T ACK
9th Pulse
Internal Clock
SWC2 _CLK
Control
Bus Conflict
Detect
External Clock
UARTi
1
0
IICM
QR
Falling Edge of 9th Pulse
S
SWC
Bus Conflict
Start Condition Detect
Stop Condition Detect
Interrupt Request
(Note 1)
UARTi
IICM=0
I/O
Timer
Port reading
* When the IICM bit is set to "1", port pin can be read
regardless of the direction register being set to "1" (output).
i=0 to 4
NOTE:
1. Set the PSj (j=0,1,3), PSLj or PSC register to determine.
IICM: Bit in the UiSMR register
IICM2: Bit in the UiSMR2 register
Figure 16.19 I²C Mode Block Diagram
Rev. 1.00 Nov. 01, 2005 Page 191 of 330
REJ09B0271-0100