M32C80 Datasheet, PDF (208/352 Pages) Renesas Technology Corp – 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES

M32C/80 Group
16. Serial I/O (UART)
16.2.4 TxD and RxD I/O Polarity Inverse
TxD pin output and RxD pin input are inversed. All I/O data level, including the start bit, stop bit and parity
bit, are inversed. Figure 16.18 shows TxD and RxD I/O polarity inverse.
(1) When the IOPOL bit in the UiMR register (i=0 to 4) is set to "0" (no inverse)
Transfer Clock ^"H"
"L"
TxDi ^"H"
(no inverse) _"L"
RxDi ^"H"
(no inverse) "L"
ST D0 D1 D2 D3 D4 D5 D6 D7 P SP
ST D0 D1 D2 D3 D4 D5 D6 D7 P SP
(2) When the IOPOL bit in the UiMR register is set to "1" (inverse)
Transfer Clock ^"H"
"L"
TxDi ^"H"
(inverse) "L"
RxDi ^"H"
(inverse) "L"
ST _{D0 D1 D2 D3 D4 D5 D6 D7}
ST _{D0 D1 D2 D3 D4 D5 D6 D7}
P SP
P ^SP
NOTE:
1. The above applies when the UFORM bit in the UiC0 register is set to "0" (LSB
first), the STPS bit in the UiMR bit is set to "0" (1 stop bit) and the PRYE bit is
set to "1" (parity enabled).
ST: Start bit
P: Even parity
SP: Stop bit
Figure 16.18 TxD and RxD I/O Polarity Inverse
Rev. 1.00 Nov. 01, 2005 Page 189 of 330
REJ09B0271-0100