M32C80 Datasheet, PDF (335/352 Pages) Renesas Technology Corp – 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES

M32C/80 Group
24. Precautions (Interrupts)
24.6.4 Watchdog Timer Interrupt
Reset the watchdog timer after a watchdog timer interrupt occurs.
24.6.5 Changing Interrupt Control Register
To change the interrupt control register while the interrupt request is denied, follow the instructions below.
Changing IR bit
The IR bit setting may not change to "0" (no interrupt requested) depending on the instructions written.
If this is a problem, use the following instruction to change the register: MOV
Changing Bits Except IR Bit
When an interrupt request is generated while executing an instruction, the IR bit may not be set to "1"
(interrupt requested) and the interrupt may be ignored. If this is a problem, use the following instructions
to change the register: AND, OR, BCLR, BSET
24.6.6 Changing IIOiIR Register (i = 0 to 4)
Use the following instructions to set bits 1 to 7 in the IIOilR register to "0" (no interrupt requested): AND,
BCLR
24.6.7 Changing RLVL Register
The DMAII bit is indeterminate after reset. When using the DMAII bit to generate an interrupt, set the
interrupt control register after setting the DMAII bit to "0" (interrupt priority level 7 available for interrupts).
Rev. 1.00 Nov. 01, 2005 ^{Page 316} of 330
REJ09B0271-0100