M32C80 Datasheet, PDF (130/352 Pages) Renesas Technology Corp – 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES

M32C/80 Group
12. DMAC
DMAi Request Source Select Register (i=0 to 3)
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
Address
DM0SL to DM3SL 037816, 037916, 037A16, 037B16
After Reset
0X00 00002
Bit
Symbol
DSEL0
Bit Name
Function
RW
RW
DSEL1
RW
DMA Request Source See Table 12.2 for the DMiSL
DSEL2 _{Select Bit(1)}
register (i=0 to 3) function
RW
DSEL3
RW
DSEL4
RW
Software DMA
DSR _{Request Bit(2)}
When a software trigger is selected,
a DMA request is generated by
setting this bit to "1" (When read, its
RW
content is always "0")
Reserved Bit
(b6)
When read,
RO
its content is indeterminate
DRQ DMA Request Bit^{(2, 3)}
0: Not requested
1: Requested
RW
NOTES:
1. Change the DSEL4 to DSEL0 bit settings while the MDi1 and MDi0 bits in the DMD0 and DMD1
registers are set to "002" (DMA disabled). Also, set the DRQ bit to "1" simultaneously when the
DSEL4 to DSEL0 bit settings are changed.
e.g., MOV.B #083h, DMiSL ; Set timer A0
2. When the DSR bit is set to "1", set the DRQ bit to "1" simultaneously.
e.g., OR.B #0A0h, DMiSL
3. Do not set the DRQ bit to "0".
Figure 12.2 DM0SL to DM3SL Registers
Rev. 1.00 Nov. 01, 2005 Page 111 of 330
REJ09B0271-0100