M32C80 Datasheet, PDF (230/352 Pages) Renesas Technology Corp – 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES

M32C/80 Group
16. Serial I/O (Special Function)
Table 16.31 Pin Settings in IE Mode (1)
Port
P61
P62
P63
P65
P66
P67
Function
CLK0 input
CLK0 output
RxD0 input
TxD0 output
CLK1 input
CLK1 output
RxD1 input
TxD1 output
Setting
PS0 Register
PD6 Register
PS0_1=0
PD6_1=0
PS0_1=1
–
PS0_2=0
PD6_2=0
PS0_3=1
–
PS0_5=0
PD6_5=0
PS0_5=1
–
PS0_6=0
PD6_6=0
PS0_7=1
–
Table 16.32 Pin Settings (2)
Port
Function
Setting
P70(1)
P71(1)
TxD2 output
RxD2 input
PS1 Register
PS1_0=1
PS1_1=0
PSL1 Register
PSL1_0=0
–
PSC Register
PSC_0=0
–
P72
CLK2 input
PS1_2=0
–
–
CLK2 output
PS1_2=1
PSL1_2=0
PSC_2=0
NOTE:
1. P70 and P71 are ports for the N-channel open drain output.
PD7 Register
–
PD7_1=0
PD7_2=0
–
Table 16.33 Pin Settings (3)
Port
Function
Setting
PS3 Register⁽¹⁾
PSL3 Register
PSC3 Register PD9 Register⁽¹⁾
P90
CLK3 input
PS3_0=0
–
–
PD9_0=0
CLK3 output
PS3_0=1
–
–
–
P91
RxD3 input
PS3_1=0
–
–
PD9_1=0
P92
TxD3 output
PS3_2=1
PSL3_2=0
–
–
P95
CLK4 input
PS3_5=0
PSL3_5=0
–
PD9_5=0
CLK4 output
PS3_5=1
–
–
–
P96
TxD4 output
PS3_6=1
–
PSC3_6=0
–
P97
RxD4 input
PS3_7=0
–
–
PD9_7=0
NOTE:
1. Set the PD9 and PS3 registers immediately after the PRC2 bit in the PRCR register is set to "1" (write enabled).
Do not generate an interrupt or a DMA transfer between the instruction to set to the PRC2 bit to "1" and the instruction
to set the PD9 and PS3 registers.
Rev. 1.00 Nov. 01, 2005 Page 211 of 330
REJ09B0271-0100