M32C80 Datasheet, PDF (192/352 Pages) Renesas Technology Corp – 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES

M32C/80 Group
16. Serial I/O
UARTi Special Mode Register 2 (i=0 to 4)
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
U0SMR2 to U4SMR2
Address
036616, 02E616, 033616, 032616, 02F616
After Reset
0016
Bit
Symbol
Bit Name
Function
RW
IICM2 I²C Mode Select Bit 2 ^{(Note 1)}
RW
CSC Clock Synchronous Bit
0: Disabled
1: Enabled
RW
SWC SCL Wait Output Bit
0: Disabled
1: Enabled
RW
ALS SDA Output Stop Bit
0: Output
RW
1: No output
STC UARTi Initialize Bit
0: Disabled
1: Enabled
RW
SWC2 SCL Wait Output Bit 2
0: Transfer clock
1: "L" output
RW
SDHI SDA Output Inhibit Bit
0: Output
1: No output (high-impedance)
RW
SU1HIM
External Clock
Synchronous Enable Bit
(Note 2)
RW
NOTES:
1. Refer to Table 16.14.
2. The external clock synchronous function can be selected by combining the SU1HIM bit and the
SCLKDIV bit in the UiSMR register.
SCLKDIV bit in the
UiSMR Register
0
0
1
SU1HIM bit in the
UiSMR2 Register
0
1
0 or 1
External Clock Synchronous Function
Selection
No synchronization
Same division as the external clock
External clock divided by 2
Figure 16.6 U0SMR2 to U4SMR2 Registers
Rev. 1.00 Nov. 01, 2005 Page 173 of 330
REJ09B0271-0100