M32C80 Datasheet, PDF (55/352 Pages) Renesas Technology Corp – 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES

M32C/80 Group
6. Processor Mode
Processor Mode Register 0⁽¹⁾
b7 b6 b5 b4 b3 b2 b1 b0
0
Symbol
PM0
Address
000416
After Reset
0000 00112
Bit
Symbol
Bit Name
Function
RW
PM00
b1 b0
0 0: Single-chip mode
RW
Processor Mode Bit^{(2, 3) 0 1: Memory expansion mode(8)}
PM01
1 0: Do not set to this value
1 1: Microprocessor mode⁽⁸⁾
RW
PM02
PM03
PM04
PM05
R/W Mode Select Bit ^{0: RD/BHE/WR}
RW
1: RD/WRH/WRL
Software Reset Bit
The microcomputer is reset when
this bit is set to "1". When read, its ^RW
content is "0".
b5 b4
0 0: Multiplexed bus is not used
RW
Multiplexed Bus Space _{0 1: Access the CS2 area using the bus}
Select Bit⁽⁴⁾
1 0: Access the CS1 area using the bus
1 1: Access all CS areas using the bus^{(5) RW}
Reserved Bit
Set to "0"
RW
(b6)
PM07
BCLK Output
Disable Bit⁽⁶⁾
0: BCLK is output⁽⁷⁾
1: BCLK is not output
The CM01 and CM00 bits in the
RW
CM0 register determine pin functions
NOTES:
1. Rewrite the PM0 register after the PRC1 bit in the PRCR register is set to "1"(write enabled).
2. The PM01 and PM00 bits maintain values set before reset, even after software reset or watchdog
timer reset has performed.
3. Do not change the PM01 and PM00 bits to "012" and "112" when the PM07 to PM02 bits are being
rewritten. Set PM07 to PM02 bits, then the PM01 and PM00 bits.
4. The PM04 and PM05 bits are available in memory expansion mode or microprocessor mode.
• Set the PM05 and PM04 bits to "002" in mode 0.
• Do not set the PM05 and PM04 bits to "012" in mode 2.
5. The PM05 and PM04 bits cannot be set to "112" in microprocessor mode since the microcomputer
starts up with separate bus after reset.
When the PM05 and PM04 bits are set to "112" in memory expansion mode, the microcomputer can
access each 64-Kbyte chip-select-assigned address space. The multiplexed bus is not available in
mode 0. The microcomputer accesses the CS0 to CS2 in mode 1, CS0 and CS1 in mode 2 and
CS0 to CS3 in mode 3.
6. No BCLK is output in single-chip mode even if the PM07 bit is set to "0". When a clock output is
terminated in microprocessor mode or memory expansion mode, set the PM07 bit to "1" and the
CM01 and CM00 bits in the CM0 register to "002" (I/O port P53). P53 outputs "L".
7. When the PM07 bit is set to "0" (BCLK output), set the CM01 and CM00 bits to "002".
Figure 6.1 PM0 Register
Rev. 1.00 Nov. 01, 2005 ^{Page 36} of 330
REJ09B0271-0100