M32C80 Datasheet, PDF (167/352 Pages) Renesas Technology Corp – 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES

M32C/80 Group
14. Timer (Timer B)
Timer Bi Mode Register (i=0 to 5)
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
TB0MR to TB5MR
Address
After Reset
035B16, 035C16, 035D16, 031B16, 031C16, 031D16 00XX 00002
Bit
Symbol
Bit Name
TMOD0
TMOD1
Operating Mode
Select Bit
MR0
MR1
MR2
Function
RW
b1b0
0 0: Timer mode
RW
0 1: Event counter mode
1 0: Pulse period measurement mode,
pulse width measurement mode _RW
1 1: Do not set to this value
RW
Function varies depending on
RW
operating mode ^{(1, 2)}
RW
MR3
RW
TCK0
TCK1
Count Source
Select Bit
RW
Function varies depending on
operating mode
RW
NOTES:
1. Only MR2 bits in the TB0MR and TB3MR registers are enabled.
2. Nothing is assigned in the MR2 bit in the TB1MR, TB2MR, TB4MR and TB5MR registers.
When write, set to "0". When read, its content is indeterminate.
Count Start Flag
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
TABSR
Address
034016
After Reset
0016
Bit
Symbol
Bit Name
Function
RW
TA0S
Timer A0 Count
Start Flag
0: Stops counting
1: Starts counting
RW
TA1S ^{Timer A1 Count}
Start Flag
0: Stops counting
1: Starts counting
RW
TA2S ^{Timer A2 Count}
Start Flag
0: Stops counting
1: Starts counting
RW
TA3S
Timer A3 Count
Start Flag
0: Stops counting
1: Starts counting
RW
TA4S
Timer A4 Count
Start Flag
0: Stops counting
1: Starts counting
RW
TB0S
Timer B0 Count
Start Flag
0: Stops counting
1: Starts counting
RW
TB1S
Timer B1 Count
Start Flag
0: Stops counting
1: Starts counting
RW
TB2S
Timer B2 Count
Start Flag
0: Stops counting
1: Starts counting
RW
Figure 14.18 TB0MR to TB5MR Registers, TABSR Register
Rev. 1.00 Nov. 01, 2005 Page 148 of 330
REJ09B0271-0100