M32C80 Datasheet, PDF (229/352 Pages) Renesas Technology Corp – 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES

M32C/80 Group
16. Serial I/O (Special Function)
16.6 Special Mode 4 (IE Mode)
In IE mode, devices connected with the IEBus can communicate in UART mode.
Table 16.30 lists register settings. Tables 16.31 to 16.33 list pin settings.
Table 16.30 Register Settings in IE Mode
Register
Bit
Function
UiTB
8 to 0
Set transmit data
UiRB
8 to 0
Received data can be read
OER, FER,
Error flags
PER, SUM
UiBRG 7 to 0
Set bit rate
UiMR
SMD2 to SMD0 Set to "1102"
CKDIR
Select the internal clock or external clock
STPS
Set to "0"
PRY
Disabled because the PRYE bit is set to "0"
PRYE
Set to "0"
IOPOL
Select TxD and RxD I/O polarity
UiC0
CLK1, CLK0
Select count source for the UiBRG register
CRS
Disabled because the CRD bit is set to "1"
TXEPT
Transfer register empty flag
CRD
Set to "1"
NCH
Select output format of the TxDi pin
CKPOL
Set to "0"
UFORM
Set to "0"
UiC1
TE
Set to "1" to enable data transmission
TI
Transfer buffer empty flag
RE
Set to "1" te enable data reception
RI
Reception complete flag
UiIRS
Select what causes the UARTi transmit interrupt to be generated
UiRRM, UiLCH, Set to "0"
SCLKSTPB
UiSMR 3 to 0
Set to "00002"
ABSCS
Select bus conflict detect sampling timing
ACSE
Set to "1" to automatically clear the transmit enable bit
SSS
Select transmit start condition
SCLKDIV
Set to "0"
UiSMR2 7 to 0
Set to "0016"
UiSMR3 7 to 0
Set to "0016"
UiSMR4 7 to 0
Set to "0016"
IFSR
IFSR6, IFSR7
Select how the bus conflict interrupt occurs
i=0 to 4
Rev. 1.00 Nov. 01, 2005 Page 210 of 330
REJ09B0271-0100