|
SAB82538 Datasheet, PDF (95/253 Pages) Infineon Technologies AG – ICs for Communications | |||
|
◁ |
SAB 82538
SAF 82538
2.6.4 Data Encoding
The ESCC8 supports the following coding schemes for serial data:
â Non-Return-To-Zero (NRZ)
â Non-Return-To-Zero-Inverted (NRZI)
â FM0 (also known as Bi-Phase Space)
â FM1 (also known as Bi-Phase Mark)
â Manchester (also known as Bi-Phase)
NRZ: The signal level corresponds to the value of the data bit. By programming bit DIV
(CCR2 register) the ESCC8 may made to transmit and receive data inverted.
NRZI: A logical â0â is indicated by a transition and a logical â1â by no transition at the
beginning of the bit cell.
Figure 40
NRZ and NRZI Data Encoding
FM0: An edge occurs at the beginning of every bit cell. A logical â0â has an additional
edge in the center of the bit cell, a logical â1â has none. The transmit clock precedes the
receive clock by 90Ë.
FM1: An edge occurs at the beginning of every bit cell. A logical â1â has an additional
edge in the center of the bit cell, a logical â0â has none. The transmit clock precedes the
receive clock by 90Ë.
Semiconductor Group
95
|
▷ |