SAB82538 Datasheet, PDF (234/253 Pages) Infineon Technologies AG – ICs for Communications

SAB 82538
SAF 82538
Note 1: Function of DTACK is described logically as:
DTACK = CS x DACK x INTAi + DS x R/W
i.e. in accordance with common specifications of Motorola accesses
DTACK goes active if either CS or DACKx is active and R/W goes low
DTACK goes inactive if CS and DACKx are inactive or write R/W goes high.
To guarantee correct function in the case of write bursts signals CS and DACKx
have to be inactive after each write access (e.g. by deriving them from the
Address Strobe AS).
Note 2: DRT is reset with the falling edge of CS or DACK if the last write access to
XFIFO is expected. However, DRT will be activated again in the case of an
access to any other register or FIFO.
Figure 61
Motorola W to R Control Interval
Semiconductor Group
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