SAB82538 Datasheet, PDF (94/253 Pages) Infineon Technologies AG – ICs for Communications

SAB 82538
SAF 82538
2.6.3.5 Functions of RTS Output
In clock modes 0, 1 and 4, the RTS output can be programmed via CCR2 (SOC bits) to
be active when data (frame or character) is being transmitted. This signal is delayed by
one clock period with respect to the data output T×D, and marks all data bits that could
be transmitted without collision. In this way a configuration may be implemented in which
the bus access is resolved on a local basis (collision bus) and where the data are sent
one clock period later on a separate transmission line.
Figure 39
Request-to-Send in Bus Operation
Note: For details on the functions of the RTS pin refer to chapter 2.6.5.
Semiconductor Group
94