SAB82538 Datasheet, PDF (163/253 Pages) Infineon Technologies AG – ICs for Communications

SAB 82538
SAF 82538
ASYNC Mode
STOP…
Stop Bit
This bit defines the number of Stop bits generated by the transmitter:
0…1 Stop bit.
1…2 Stop bits.
PAR1, PAR0… Parity Format
If parity check/generation is enabled by setting PARE, these bits define the
parity type:
00… SPACE (“0”)
01… odd parity
10… even parity
11… MARK (“1”)
The received parity bit is stored in RFIFO
– as leading bit immediately preceding the character if character length is
5 to 7 bits and RFC.DPS is set to 0, and as LSB of the status byte
pertaining to the character if the corresponding RFIFO data format is
enabled.
– as LSB of the status byte pertaining to the character if character length is
8 bits and the corresponding RFIFO data format is enabled.
Parity error is indicated in the MSB of the status byte pertaining to the
character, if enabled. Additionally, a parity error interrupt can be generated.
PARE…
Parity Enable
0… parity check/generation disabled
1… parity check/generation enabled
CHL1–CHL0… Character Length
These bits define the length of received and transmitted characters,
excluding optional parity:
00… 8 bit
01… 7 bit
10… 6 bit
11… 5 bit
Semiconductor Group
163