SAB82538 Datasheet, PDF (73/253 Pages) Infineon Technologies AG – ICs for Communications

SAB 82538
SAF 82538
2.4 Asynchronous Serial Mode
2.4.1 Character Frame
Character framing is achieved by special Start and Stop bits. Each data character is
preceded by one Start bit and terminated by one or two Stop bits. The character length
is selectable from 5 up to 8 bits. Optionally, a parity bit can be added which complements
the number of ones to an even or odd quantity (even/odd parity). The parity bit can also
be programmed to have a fixed value (Mark or Space). Figure 33 shows the
asynchronous character format.
Figure 33
Asynchronous Character Frame
2.4.2 Data Reception
2.4.2.1 Operating Modes
The ESCC8 offers the flexibility to combine clock modes, data encoding and data
sampling in many different ways. However, only definite combinations make sense and
are recommended for correct operation:
Asynchronous Mode
Prerequisites:
q Bit clock rate 16 selected (CCR1.BCR = 1)
q Clock mode 0, 1, 3b, 4, or 7b selected
q NRZ data encoding
The receiver which operates with a clock rate equal to 16 times the nominal data bit rate,
synchronizes itself to each character by detecting and verifying the Start Bit. Since
character length, parity and Stop Bit length is known, the ensuing valid bits are sampled.
Semiconductor Group
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