SAB82538 Datasheet, PDF (195/253 Pages) Infineon Technologies AG – ICs for Communications

TRS…
TLP…
SAB 82538
SAF 82538
BISYNC Mode
Timer Resolution
Selects the resolution of the internal timer (factor k, see description of TIMR
register):
0…k = 32 768
1…k = 512
Test Loop
Input and output of the BISYNC channels are internally connected.
(e.g. transmitter channel 0 - receiver channel 0)
Timer Register (READ/WRITE)
7
TIMR
CNT
VALUE
0
(offset: 23)
VALUE…
(5 bits) sets the time period t1 as follows:
t₁ = k × (VALUE + 1) × TCP
where
– k is the timer resolution factor which is either 32 768 or 512 clock cycles
dependent on the programming of TRS bit in MODE.
– TCP is the clock period of transmit data.
CNT…
(3 bits)
CNT plus VALUE determine the time period t₂ after which a timer interrupt
will be generated. The time period t₂ is
t₂ = 32 × k × CNT × TCP + t₁.
If CNT is set to 7, a timer interrupt is periodically generated after the
expiration of t₁.
Semiconductor Group
195