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SAB82538 Datasheet, PDF (21/253 Pages) Infineon Technologies AG – ICs for Communications
SAB 82538
SAF 82538
Pin Definitions and Function (cont’d)
Pin No.
Symbol Input (I) Function
Output (O)
63
XTAL1 I
Crystal Connection
64
XTAL2 (O)
If the internal oscillator is used for clock
generation the external crystal has to be
connected to these pins. Moreover, XTAL1 may
be used as common clock input for all channels
provided by an external clock generator.
All versions: common use for both channels in
clock modes 4,6,7.
Version 2 upward: additionally used in clock mode
0b and for master clock applications.
152 → 145 PA0 … 7 I/O
53 → 60 PB0 … 7
142 → 135 PC0 … 7
65 → 68 PD0 … 3
Parallel Port (Port A,B,C,D)
Four general purpose bi-directional parallel ports
(port A,B,C: 8 bit; port D: 4 bit). Every pin is
individually programmable to operate as an
output or an input (Port Configuration Register
PCRA,B,C,D).
– If defined as output, the state of the pin is
directly controlled via the microprocessor
interface(PortValueRegister PVRA,B,C,D)
– If defined as input, its state can be read via
PVRA,B,C,D. All changes may be indicated via
an interrupt status (Port Interrupt Mask register
PIMA,B,C,D, Port Interrupt Status register
PISA,B,C,D, interrupt is output on pin INT).
18, 32, 61, VSS
I
102, 114,
143
Ground (0 V)
For correct operation, all six pins have to be
connected to ground.
17, 31, 62, VDD
I
103, 144
Positive Power Supply (5 V)
For correct operation, all five pins have to be
connected to positive power supply.
83
TEST
I
Test Input
This pin always has to be connected to VSS.
(Test input for the manufacturer)
Semiconductor Group
21