SAB82538 Datasheet, PDF (108/253 Pages) Infineon Technologies AG – ICs for Communications

SAB 82538
SAF 82538
Figure 46
DMA Driven Transmission Sequence Example (HDLC)
3.3.2 Data Reception
3.3.2.1 Interrupt Mode
Also 2 × 32 byte FIFO buffers (receive pools) are provided for each channel in receive
direction.
There are different interrupt indications concerned with the reception of data:
HDLC/SDLC
q RPF (Receive Pool Full) interrupt, indicating that a 32-byte block of data can be read
from RFIFO and the received message is not yet complete.
q RME (Receive Message End) interrupt, indicating that the reception of one message
is completed, i.e. either
* one message with less than 32 bytes, or the
* last part of a message with more than 32 bytes
is stored in the RFIFO.
In addition to the message end (RME) interrupt the following information about the
received frame is stored by the ESCC8 in special registers and/or RFIFO:
Semiconductor Group
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