SAB82538 Datasheet, PDF (213/253 Pages) Infineon Technologies AG – ICs for Communications

SAB 82538
SAF 82538
BISYNC Mode
IC1– IC0… Interrupt Port Configuration
These bits define the function of the interrupt output stage (pin INT):
IOC1
X
0
1
IOC0
0
1
1
Function
Open drain output
Push/pull output, active low
Push/pull output, active high
Interrupt Status Register 0 (READ)
Value after RESET: 00_H
7
0
ISR0
TCD 0 PERR SCD PLLA CDSC RFO RPF (offset: 3A)
All bits are reset when ISR0 is read. Additionally, TCD and RPF are reset when the
corresponding interrupt vector is output.
Note: If bit IPC.VIS is set to “1”, interrupt statuses in ISR0 may be flagged although
they are masked via register IMR0. However, these masked interrupt statuses
neither generate an interrupt vector or a signal on INT, nor are visible in register
GIS.
TCD…
Termination Character Detected
The termination character (TCR) has been received or the execution of the
RFRD command issued before has been completed. A data block is now
available in the RFIFO. The actual block length can be determined by
reading register RBCL first.
PERR…
Parity Error
Only valid if parity check/generation is enabled.
If set, a character with parity error has been received. If enabled via RFDF,
parity error information is stored in RFIFO in the status byte pertaining to
that character.
SCD...
SYN Character Detected
Only valid in Hunt Mode.
This bit is set if a SYN character is found in the received data stream after
the HUNT command has been issued. The receiver now is in the
synchronous state.
Semiconductor Group
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