SAB82538 Datasheet, PDF (86/253 Pages) Infineon Technologies AG – ICs for Communications

SAB 82538
SAF 82538
Summary
The features of the different clock modes are summarized in table 5.
Table 5
Clock Modes of ESCC8
Channel
Configur.
Clock Sources
Control Sources
0a 0 OSC –
– RxCLK TxCLK CD –
–
–
–
0b 1 OSC OSC – RxCLK BRG CD –
–
–
BRG
1 X OSC –
– RxCLK RxCLK – CD TxCLK –
–
2a 0 OSC RxCLK BRG DPLL TxCLK CD –
–
–
–
2b 1 OSC RxCLK BRG DPLL BRG/16 CD –
–
– BRG/16
3a 0 OSC RxCLK BRG DPLL DPLL CD –
–
–
DPLL
3b 1 OSC RxCLK – BRG BRG CD –
–
–
BRG
4 X OSC –
– OSC OSC CD –
–
–
OSC
5X–
–
– RxCLK RxCLK – (TSAR) (TSAX) CD TS-Control
6a 0 OSC OSC BRG DPLL TxCLK CD –
–
–
–
6b 1 OSC OSC BRG DPLL BRG/16 CD –
–
– BRG/16
7a 0 OSC OSC BRG DPLL DPLL CD –
–
–
DPLL
7b 1 OSC OSC – BRG BRG CD –
–
–
BRG
Notes:
q If ASYNC Mode is programmed, the baud rate depends on the Bit Clock Rate (1 or
16) selected by bit CCR1.BCR:
Clock Mode
0a
0b
1
3b, 7b
4
Receive
RxCLK/BCR
RxCLK/BCR
RxCLK/BCR
BRG/BCR
OSC/BCR
Transmit
TxCLK
BRG
RxCLK/BCR
BRG/BCR
OSC/BCR
When BCR is set to “16”, oversampling (3 samples) in conjunction with majority
decision is performed. BCR has no effect when using clock mode 2, 3a, 6, or 7a.
Semiconductor Group
86