SAB82538 Datasheet, PDF (165/253 Pages) Infineon Technologies AG – ICs for Communications

SAB 82538
SAF 82538
ASYNC Mode
RFTH1, RFTH0… RFIFO Threshold Level
These bits define the level up to which RFIFO is filled with valid data:
RFTH1, 0
Threshold level (bytes)
RFDF = 0
RFDF = 1
00
1 ( 1d)
2 ( 1d + 1s)
01
4 ( 4d)
4 ( 2d + 2s)
10
16 (16d)
16 ( 8d + 8s)
11
32 (32d)
32 (16d + 16s)
d: data byte
s: status byte
TCDE…
If the threshold level is reached, the RPF interrupt is generated if enabled.
After RPF is generated, the contents of RFIFO (RFTH bytes) can be read
by the CPU. To indicate that this RFIFO pool can be released, an RMC
command has to be issued.
Termination Character Detection Enable
When this bit is set, the received data stream is monitored for “termination
character” (TCR register). When such a character occurs, the TCD interrupt
is generated if enabled via mask register IMR0. The number of bytes to be
read from RFIFO is determined by the value of RBCL.
Receive Byte Count Low (READ)
7
RBCL RBC7
0
RBC0 (offset: 2A)
Indicates the number of valid bytes available in the accessible part of the RFIFO. This
register must be read by the CPU following a TCD interrupt. In case of a TCD interrupt
the number of valid bytes in the accessible part of the RFIFO can be evaluated by
“AND”-ing the contents of RBCL with: threshold level (bytes) – 1.
Threshold Level
Mask
4
03_H
16
0F_H
32
1F_H
RBC is reset with RMC after preceeding TCD interrupt.
In case of RPF interrupt RBC is incremented by “threshold level (bytes)”.
Semiconductor Group
165