SAB82538 Datasheet, PDF (16/253 Pages) Infineon Technologies AG – ICs for Communications

SAB 82538
SAF 82538
Pin Definitions and Function (cont’d)
Pin No. Symbol
Input (I)
Function
Output (O)
101
IE0
I/O
100
IE1
I
99
IE2
I
Interrupt Enable 0, 1, 2
The function depends on the selected cascading
mode:
Slave mode: IE0-2 are inputs.
Interrupt acknowledge is accepted if an interrupt
signal has been generated and the slave address
provided via IE0, IE1, IE2 corresponds to the
programmed value (IPC register).
If not used, IE0-2 should be tied to GND and the
slave address should be set to “0” (e.g. single
device application).
Daisy Chaining mode: IE0 is output, IE1 is input.
IE2 is unused and has to be fixed to “0” or “1”.
Normally, IE1 is connected to the IE0 pin of
devices with higher priority. If not used, IE1 has to
be fixed to “1”.
If IE1 is reset (“0”)
– the IE0 output is reset immediately,
– an active INT signal will be prohibited or
aborted.
– INT is hold inactive unconditionally as long as
IE1 is “0”.
As long as INTA input is inactive, IE1 = “1”
enables INT signal generation. If INT goes active,
pin IE0 immediately is set to “0”.
Interrupt acknowledge is accepted if the Interrupt
Enable input IE1 is active during the following
INTA cycle. During this cycle, and additionally till
the end of the second INTA cycle in Siemens/Intel
bus mode, triggering of INT signal generation is
prohibited, i.e. no interrupt will be generated while
(another) device is under service. This is valid
even for devices with higher priority.
Pin IE0 returns to active state (logical “1”) when
INT is deactivated and IE1 input is high.
Semiconductor Group
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