SAB82538 Datasheet, PDF (237/253 Pages) Infineon Technologies AG – ICs for Communications

SAB 82538
SAF 82538
Motorola Bus Interface Timing and Interrupt Timing
Parameter
No. Symbol Limit Values Unit
min. max.
Address, BLE, DACK setup time before DS active 34 t_su(A)
15
ns
Address, BLE, DACK hold after DS inactive
35 t_h(A)
0
ns
CS active before DS active
36 t_su(S)
0
ns
CS hold after DS inactive
36A t_h(S)
0
ns
R/W stable before DS active
37 t_su(RW)
5
ns
R/W hold after DS inactive
38 t_h(RW)
0
ns
DS pulse width (read access)
(write access)
39 t_w(DS)R 90
ns
39A t_w(DS)W 60
ns
DS control interval
t 40
rec(DS)
70
ns
Data valid after DS active(read access)
41 t_a(DS)
80 ns
Data hold after DS inactive (read access)
42 t_v(DS)
10
ns
DS inactive to databus tristate (read access)
Note 1
42A t_dis(DS)
40 ns
DRR low after DS active
43 t_p(DRR)
65 ns
Data stable before DS active (write access)
44 t_su(D)
30
ns
Data hold after DS inactive (write access)
45 t_h(D)
10
ns
DRT low after DS or DACK active
46
t_dis(DRT)
50 ns
DRT return to one after CS or DACK inactive
47 t_p(DRT)
50 ns
CS, DACK inactive setup before DS (INTA cycle) 19A t_dis(S-INTA) 20
ns
CS, DACK inactive hold after DS (INTA cycle) 20A t_h(INTA-S) 20
ns
Semiconductor Group
237