SAB82538 Datasheet, PDF (29/253 Pages) Infineon Technologies AG – ICs for Communications

SAB 82538
SAF 82538
1.4.2.4 Interrupt Cascading
The ESCC8 supports two cascading schemes which can be selected by programming
the IPC register:
Slave Mode
Interrupt outputs of several devices (slaves) are connected to a priority resolving unit
(e.g. interrupt controller). The slave which is selected for the interrupt service routine is
addressed via special address lines during the interrupt acknowledge cycle. For this
application the ESCC8 offers three Interrupt Enable inputs (IE0, IE1,IE2) and a
programmable 3-bit slave ID.
Figure 7
Interrupt Cascading (Slave Mode) in Intel Bus Mode
For Intel type microprocessor systems the 2-cycle interrupt acknowledge scheme is
supported (’86 mode).
Semiconductor Group
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