SAB82538 Datasheet, PDF (119/253 Pages) Infineon Technologies AG – ICs for Communications

SAB 82538
SAF 82538
HDLC Mode
RDO…
Receive Data Overflow
A data overflow has occurred during reception of the frame.
Additionally, an interrupt can be generated (refer to ISR1.RDO/
IMR1.RDO).
CRC…
CRC Compare/Check
0… CRC check failed; received frame contains errors.
1… CRC check o.k.; received frame is error-free.
RAB…
Receive Message Aborted
The received frame was aborted from the transmitting station. According to
the HDLC protocol, this frame must be discarded by the receiver station.
HA1, HA0… High Byte Address Compare
Significant only if 2-byte address mode has been selected.
In operating modes which provide high byte address recognition, the
ESCC8 compares the high byte of a 2-byte address with the contents of two
individually programmable registers (RAH1, RAH2) and the fixed values
FE_H and FC_H (broadcast address).
Dependent on the result of this comparison, the following bit combinations
are possible:
10… RAH1 has been recognized
00… RAH2 has been recognized
01… broadcast address has been recognized
Note: If RAH1, RAH2 contain identical values, a match is indicated by '10'.
C/R…
Command/Response
Significant only if 2-byte address mode has been selected.
Value of the C/R bit (bit in high address byte) in the received frame. The
interpretation depends on the setting of the CRI bit in the RAH1 register.
Refer also to the description of RAH1 register.
LA…
Low Byte Address Compare
Not significant in transparent and extended transparent operating modes.
The low byte address of a 2-byte address field, or the single address byte
of a 1-byte address field is compared with two registers. (RAL1, RAL2).
0… RAL2 has been recognized
1… RAL1 has been recognized
According to the X.25 LAPB protocol, RAL1 is interpreted as the address of
a COMMAND frame and RAL2 is interpreted as the address of a
RESPONSE frame.
Semiconductor Group
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