SAB82538 Datasheet, PDF (225/253 Pages) Infineon Technologies AG – ICs for Communications

SAB 82538
SAF 82538
Figure 55
Siemens/Intel Read Cycle Timing
Note 1: Function of DTACK is described logically as:
DTACK = (CS x DACK + RD x WR) x INTAi
INTAi is an internally generated signal.
Note 2: DRR is reset with the falling edge of RD during the last read access to RFIFO.
Semiconductor Group
225