SAB82538 Datasheet, PDF (229/253 Pages) Infineon Technologies AG – ICs for Communications

SAB 82538
SAF 82538
Siemens/Intel Bus Interface and Interrupt Timing
Parameter
No. Symbol
Address, BHE, DACK setup time
1
t_su(A)
Address, BHE, DACK hold time
2
t_h(A)
CS setup time
3
t_su(S)
CS hold time
3A t_h(S)
Address, BHE stable before ALE inactive 4 t_su(A-ALE)
Address, BHE hold after ALE inactive
5
t_h(ALE-A)
ALE pulse width
6
t_w(ALE)
Address latch setup time before cmd
active
7
t_su(ALE)
ALE to command inactive delay
RD pulse width
RD control interval
Data valid after RD active
Data hold after RD inactive
RD inactive to data bus tristate Note 1
DRR low after RD active
WR pulse width
WR control interval
Data stable before WR inactive
Note: Not tested in production.
t 7A
rec(ALE)
8
t_w(R)
9
t_rec(R)
10 t_a(R)
11 t_v(R)
11A t_dis(R)
12 t_p(DDR)
13 t_w(W)
14 t_rec(W)
15 t_su(D)
Limit Values Unit
min. max.
15
ns
0
ns
0
ns
0
ns
20
ns
10
ns
30
ns
0
ns
20
ns
90
ns
50
ns
80
ns
10
ns
40
ns
65
ns
50
ns
35
ns
30
ns
Semiconductor Group
229