SAB82538 Datasheet, PDF (20/253 Pages) Infineon Technologies AG – ICs for Communications

SAB 82538
SAF 82538
Pin Definitions and Function (cont’d)
Pin No. Symbol
13
TXD0
15
TXD1
19
TXD2
21
TXD3
113
TXD4
111
TXD5
109
TXD6
107
TXD7
9
TXCLK0
10
TXCLK1
11
TXCLK2
12
TXCLK3
118
TXCLK4
117
TXCLK5
116
TXCLK6
115
TXCLK7
Input (I)
Function
Output (O)
O/oD
Transmit Data (Channel 0 … 7)
Transmit data is shifted out via these pins. They
can be programmed to be either a push-pull or
open drain output to support bus configurations.
Note: Pin TxD is “or” ed with pin RTS if NRZI
encoding and IDLE as Interframe Time Fill
are selected and bit MODE.RTS is reset.
May be switched to RxD function via bit
CCR2.SOC1.
I/O
Transmit Clock (Channel 0 … 7)
The function of this pin depends on the selected
clock mode and the value of the SSEL bit (CCR2
register). For detailed information about the clock
modes refer to chapter 2.
If programmed as an input, this pin supplies either
– the transmit clock for the channel (clock
mode 0, 2, 6; SSEL bit in CCR2 is reset), or
– a transmit strobe signal for the channel
(clock mode 1).
If programmed as an output (bit CCR2.TOE is
set), this pin supplies either
– the transmit clock for the channel which is
generated
q either from the baud rate generator (clock
mode 2, 3, 6, 7; SSEL bit in CCR2 is set),
q or from the DPLL circuit (clock mode 3, 7;
SSEL bit in CCR2 is reset)
q or from the crystal oscillator (clock mode 4),
q or an active-low tri-state control signal
marking the programmed transmit time-slot
(clock mode 5) if bit CCR2.TOE is set.
Semiconductor Group
20