SAB82538 Datasheet, PDF (164/253 Pages) Infineon Technologies AG – ICs for Communications

RFIFO Control Register (READ/WRITE)
Value after RESET: 00_H
7
RFC
0 DPS 0 RFDF RFTH1 RFTH0 0
SAB 82538
SAF 82538
ASYNC Mode
0
TCDE (offset: 28)
Note: Unused bits have to be set to logical “0”.
DPS…
Disable Parity Storage
Only valid if parity check/generation is enabled via DAFO.PARE and
character length is less than 8 bits.
0… The parity bit is stored
1… The parity bit is not stored
in the data byte of RFIFO.
Note: The parity bit is always stored in the status byte.
RFDF…
RFIFO Data Format
0… only data bytes (character plus optional parity up to 8 bit) are stored.
1… additionally to every data byte, an attached status byte is stored.
RFDF = 0
– character 5 – 8 bit
or
– character 5 – 7(8)* bit
+ parity
* : parity bit is lost
RFDF = 1
– character 5 – 8 bit
+ status
or
– character 5 – 7(8)* bit
+ parity
+ status
* : parity bit is in status byte
7
Data Byte
4
(P)
0
Char
7
Data Byte
4
0
(P)
Char
76
0
Status Byte PE FE
P
FE : framing error PE : parity error P : parity bit (P): can be disabled via bit DPS
Semiconductor Group
164