SAB82538 Datasheet, PDF (175/253 Pages) Infineon Technologies AG – ICs for Communications

Mask XON Character (WRITE)
(Version 2 upwards)
Value after RESET: 00_H
7
MXN
MXN7
SAB 82538
SAF 82538
ASYNC Mode
0
MXN0 (offset: 36)
This register is used to masked single bit positions of the XON character. Refer to the
description of the XON register. The number of significant bits is determined by the
programmed character length (right justified).
A “1” in the mask register has the effect that no comparison is performed between the
corresponding bits in the received characters (“don’t cares”) and the XON register. At
RESET, the mask register is zeroed, i.e. all bit positions are compared.
Mask XOFF Character (WRITE)
(Version 2 upwards)
Value after RESET: 00_H
7
MXF
MXF7
0
MXF0 (offset: 37)
This register is used to mask single bit positions of the XOFF character. Refer to the
description of the XOFF register. The number of significant bits is determined by the
programmed character length (right justified).
A “1” in the mask register has the effect that no comparison is performed between the
corresponding bits in the received characters (“don’t cares”) and the XOFF register. At
RESET, the mask register is zeroed. i.e. all bit positions are compared.
Semiconductor Group
175