XRT74L73 Datasheet, PDF (40/488 Pages) Exar Corporation – 3 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER

XRT74L73
3 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER
REV. P1.0.1
PRELIMINARY
PIN DESCRIPTION
PIN#
AF26
AC26
AB25
AA24
AE26
AD25
AC24
AB23
AE24
AD23
AF24
AE22
AC22
AF22
AE20
AD21
AC18
NAME
RxUData0/
RxPData0
RxUData1/
RxPData1
RxUData2/
RxPData2
RxUData3/
RxPData3
RxUData4/
RxPData3
RxUData5/
RxPData4
RxUData6/
RxPData5
RxUData7/
RxPData7
RxUData8/
RxPData8
RxUData9/
RxPData9
RxUData10/
RxPData10
RxUData11/
RxPData11
RxUData12/
RxPData12
RxUData13/
RxPData13
RxUData14/
RxPData14
RxUData15/
RxPData15
RxUEn/RxPEn
TYPE
O
DESCRIPTION
Receive UTOPIA Data Bus Input/Receive POS-PHY Data Bus Output pins:
The exact function of these output pins depends upon whether the XRT74L73
device has been configured to operate in the ATM UNI or in the PPP Mode.
ATM UNI Mode - RxUData[15:0]
These output pins function as the Receive UTOPIA Data Bus. ATM cell data
that has been received from the Remote Terminal Equipment is output on the
Receive UTOPIA Data Bus, where it can be read and processed by the ATM
Layer Processor.
PPP Mode - RxPData[15:0]
These output pins function as the Receive POS-PHY Data Bus output pins.
PPP Packet data that has been received from the Remote Terminal Equipment
is output on the Receive POS-PHY Data Bus, where it can be reads and pro-
cessed by the Link Layer Processor.
I
Receive UTOPIA Interface - Output Enable/Receive POS-PHY Interface -
Output Enable
The exact function of this output pin depends upon whether the XRT74L73
device has been configured to operate in the ATM UNI or PPP mode.
ATM UNI Mode - RxUEn:
This active-low input signal is used to control the drivers of the Receive UTOPIA
Data Bus. When this signal is "high" (negated) then the Receive UTOPIA Data
Bus is tri-stated. When this signal is asserted, then the contents of the byte or
word that is at the "front of the RxFIFO" will be "popped" and placed on the
Receive UTOPIA Data bus on the very next rising edge of RxUClk.
PPP Mode - RxPEn
This active-low input signal is used to control the drivers of the Receive POS-
PHY Data Bus. When this signal is "high" (negated) then the Receive POS-PHY
Data Bus is tri-stated. When this signal is asserted, then the contents of the byte
or word that is at the "front" of the RxFIFO will be "popped" and placed on the
Receive POS-PHY Data bus on the very next rising edge of RxPClk.
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