XRT74L73 Datasheet, PDF (344/488 Pages) Exar Corporation – 3 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER

XRT74L73
3 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER
REV. P1.0.1
PRELIMINARY
RXE3 CONFIGURATION & STATUS REGISTER - 2 (ADDRESS = 0X11)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
RxLOF
Algo
RxLOF
RxOOF
RxLOS
RxAIS
Not Used
R/W
RO
RO
RO
RO
RO
RO
0
1
1
0
0
1
1
BIT 0
RxFERF
RO
1
Writing a “0” into this bit-field causes the Receive E3
Framer block to reside in the OOF Condition state for
at most 24 E3 frame periods. Writing a “1” into this
bit-field causes the Receive E3 Framer block to re-
side in the OOF Condition state for at most 8 E3
frame periods.
LOF (Loss of Framing) Condition State
If the Receive E3 Framer block enters the LOF Con-
dition state, then the following things will happen.
• The Receive E3 Framer block will discard the most
recent frame synchronization and,
• The Receive E3 Framer block will make an uncon-
ditional transition to the FAS Pattern Search state.
• The Receive E3 Framer block will notify the Micro-
processor/Microcontroller of its transition to the
LOF Condition state, by generating the Change in
LOF Condition interrupt. When this occurs, Bit 2
(LOF Interrupt Status), within the Rx E3 Interrupt
Status Register - 1 will be set to “1”, as depicted
below.
RXE3 INTERRUPT STATUS REGISTER - 1 (ADDRESS = 0X14)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Not Used
COFA
Interrupt
Status
OOF
Interrupt
Status
LOF
Interrupt
Status
LOS
Interrupt
Status
AIS
Interrupt
Status
RO
RO
RO
RUR
RUR
RUR
RUR
RUR
0
0
0
0
0
1
0
0
Finally, the Receive E3 Framer block will also inform
the external circuitry of this transition to the LOF Con-
dition state by toggling the RxLOF output pin "High”.
5.3.2.2 The Framing Maintenance Mode
Once the Receive E3 Framer block enters the In-
Frame state, then it will notify the Microprocessor/Mi-
crocontroller of this fact by generating both the
Change in OOF Condition and Change in LOF Condi-
tion Interrupts. When this happens, bits 2 and 3 (LOF
Interrupt Status and OOF Interrupt Status) will be set
to “1”, as depicted below.
RXE3 INTERRUPT STATUS REGISTER - 1 (ADDRESS = 0X14)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Not Used
COFA
Interrupt
Status
OOF
Interrupt
Status
LOF
Interrupt
Status
LOS
Interrupt
Status
AIS
Interrupt
Status
RO
RO
RO
RUR
RUR
RUR
RUR
RUR
0
0
0
0
1
1
0
0
Additionally, the Receive E3 Framer block will inform
the external circuitry of its transition to the In-Frame
state by toggling both the RxOOF and RxLOF output
pins "Low”.
Finally, the Receive E3 Framer block will negate both
the RxOOF and the RxLOF bit-fields within the Rx E3
Configuration & Status Register, as depicted below.
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