XRT74L73 Datasheet, PDF (14/488 Pages) Exar Corporation – 3 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER

XRT74L73
3 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER
REV. P1.0.1
PRELIMINARY
PIN DESCRIPTION
PIN#
NAME
TYPE
DESCRIPTION
Transmit System Side Interface Pins
A12
TxAISEn_0
D12
TxAISEn_1
C11
TxAISEn_2
I
Transmit AIS Pattern input:
This input pin permits the user to command the Transmit DS3/E3 Framer block
to transmit an AIS pattern to the remote terminal equipment.
Setting this input pin "High" configures the Transmit DS3/E3 Framer block to
transmit an AIS pattern to the remote terminal equipment.
Setting this input pin "Low" configures the Transmit DS3/E3 Framer block to
NOT transmit an AIS pattern to the remote terminal equipment.
NOTE: For normal operation, or if the user wishes to control the "Transmit AIS"
function, via Software Control; the user should tie these input pins to GND.
A11
TxFrame_0
B10
TxFrame_1
A10
TxFrame_2
A8
TxFrameRef_0
C7 TxFrameRef_1
B7
TxFrameRef_2
O Transmit End of DS3 Frame Indicator:
This output pin is pulse "high" for one DS3 or E3 clock period, when the Transmit
Section of the channel is processing the last bit of a given DS3 or E3 frame. The
implications of these output pins, for each mode of operation.
ATM UNI/PPP/High-Speed HDLC Controller Mode
This output pin simply serves as an "end-of-frame" indication to the local termi-
nal equipment.
Clear-Channel Framer Mode
If the XRT74L73 device is configured to operate in the Clear-Channel Framer
mode, then this output pin serves to alert the Local Terminal Equipment that it
needs to begin transmission of a new DS3 or E3 frame. Hence, the Local Termi-
nal Equipment uses this output signal to maintain "Framing Alignment" with the
XRT74L73 device.
I
Transmit DS3 Framer—Frame Reference Input Pin:
If the Transmit Section of the Channel is configured to operate in the "Local-Tim-
ing/Frame-Slave" Mode, then the Transmit DS3/E3 Framer block will use this
input signal as the Framing Reference.
When a given channel is configured to operate in this mode, then any rising edge
at this input pin will cause the Transmit DS3/E3 Framer block to begin its cre-
ation of a new DS3 or E3 frame. Consequently, the user must supply a clock sig-
nal that is equivalent to the DS3 or E3 frame rates (to this input pin). Further, it is
imperative that this clock signal be synchronized with the 44.736MHz or
34.368MHz clock signal applied to the TxInClk input pin.
NOTE: This input pin should be tied to “GND” if it is not used as the Transmit
DS3E3 Framer, frameing reference signal.
15