XRT74L73 Datasheet, PDF (114/488 Pages) Exar Corporation – 3 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER

XRT74L73
3 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER
REV. P1.0.1
PRELIMINARY
TABLE 13: FRAME FORMAT OF THE PLCP FRAME
PLCP FRAME 2 BYTES
A1
A2
POI 1 BYTE
P0
POH 1 BYTE
C1
PLCP PAYLOAD 53 BYTES
Twelfth ATM Cell
13–14 NIBBLES
Trailer
Each PLCP frame consists of 12 ATM Cells, 24 bytes
of Frame Alignment patterns (the A1 and A2 bytes),
12 bytes of POI (Path Overhead Identifiers), 12 bytes
of POH (Path Overhead) and a 13 or 14 nibble trailer
which is appended to the PLCP Frame for frequency
justification. Once a PLCP Frame is formed it is rout-
ed to the Transmit DS3 Framer block of the UNI. The
order of transmission of the PLCP frame begins from
the upper left hand corner of the frame (A1 byte), and
proceeds through the frame in a manner similar to
reading this page of text, to the lower right hand cor-
ner (the 13 or 14 nibble trailer).
The definition of each of the overhead bytes within
the PLCP Frame are presented below.
A1, A2 Frame Alignment Pattern Bytes
Each row within a PLCP frame will begin with two
bytes of Frame Alignment patterns which are denoted
as A1 and A2 in Table 13 . In accordance with the
ATM Forum UNI spec, the Transmit PLCP Processor
will assign the values: A1 = F6h and A2 = 28h.
POI (Path Overhead Identifier) Bytes: P0-P11
The Path Overhead Identifier (POI) bytes are used to
index the adjacent Path Overhead (POH) bytes, as
tabulated below in Table 14 .
TABLE 14: POI CODE AND ASSOCIATED POH BYTES
POI
POI CODE
P11
2Ch
P10
29h
P9
25h
P8
20h
P7
1Ch
P6
19h
P5
15h
P4
10h
P3
0Dh
P2
08h
P1
04h
P0
01h
ASSOCIATED POH BYTE
Z6
Z5
Z4
Z3
Z2
Z1
F1 (Frame)
B1 (BIP-8)
G1 (FEBE)
M1
M2
C1 (Stuff Indicator)
The Path Overhead bytes (POH) are defined below.
• Z1–Z6 Bytes: Growth Octets
The Z1–Z6 octets presently have no particular appli-
cation, and are reserved for future use. The Transmit
PLCP Processor will set these octets to 00h. The
far-end Receive PLCP Processor will ignore the
values contained in these fields.
• F1: User Octet
This byte is unused in the UNI and is consequently
programmed to 00h. Therefore, the Far-End Receive
PLCP Processor will ignore the values contained in
the byte-field.
Note: This octet is used in the IEEE 802.6 MAN and in
SMDS applications as a 64 kbps data link channel for
proprietary use by the network provider.
• B1–Bit Interleaved Parity–8
The B1 byte contains the result of BIP-8 (Bit Inter-
leaved Parity) calculations. The Bit Interleaved Parity
(BIP-8) byte field supports path error monitoring. The
Transmit PLCP Processor will compute the BIP-8 over
a 12 x 54 octet structure, within each PLCP frame.
Specifically, these calculations involve the path over-
head (POH) byte fields and the associated ATM cells
for a total of 648 octets. The resulting BIP-8 value is
inserted into the B1 byte field within the very next
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