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XRT74L73 Datasheet, PDF (153/488 Pages) Exar Corporation – 3 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER
PRELIMINARY
XRT74L73
3 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER
REV. P1.0.1
PMON Received Valid Cell Count—MSB (Address = 34h)
BIT 7
RUR
0
BIT 6
RUR
0
BIT 5
RUR
0
BIT 4
BIT 3
RxValid Cell Count—High Byte
RUR
RUR
0
0
BIT 2
RUR
0
BIT 1
RUR
0
BIT 0
RUR
0
PMON Received Valid Cell Count—LSB (Address = 35h)
BIT 7
RUR
0
BIT 6
RUR
0
BIT 5
RUR
0
BIT 4
BIT 3
RxValid Cell Count—Low Byte
RUR
RUR
0
0
BIT 2
RUR
0
BIT 1
RUR
0
BIT 0
RUR
0
The contents of this register reflect the total number of
valid cells that the Receive Cell Processor has received
since the last reading of this register. This register is
reset upon read.
Finally, the user can also monitor the total number of
cells that have been discarded (either due to HEC
errors, Idle Cell removal, or User cell filtering) by
reading the PMON Discarded Cell Count Registers
(Address = 36h, 37h). The bit-format of this register is
presented below.
PMON Discarded Cell Count—MSB (Address = 36h)
BIT 7
RUR
0
BIT 6
RUR
0
BIT 5
RUR
0
BIT 4
BIT 3
Cell Drop Count—High Byte
RUR
RUR
0
0
BIT 2
RUR
0
BIT 1
RUR
0
BIT 0
RUR
0
PMON Discarded Cell Count—LSB (Address = 37h)
BIT 7
RUR
0
BIT 6
RUR
0
BIT 5
RUR
0
BIT 4
BIT 3
Cell Drop Count—Low Byte
RUR
RUR
0
0
BIT 2
RUR
0
BIT 1
RUR
0
BIT 0
RUR
0
The contents of these registers reflect the number of
cells that have been discarded since the last read of
these registers. These registers are reset upon read.
3.3.2.5Cell Payload De-Scrambling
In numerous applications the payload portion of the in-
coming cells will be scrambled by the Transmit Cell
Processor, within the Far End Transmitting terminal.
These cells are scrambled in order to prevent the User
data from mimicking framing or control bytes. There-
fore, the Receive Cell Processor provides the user
with the option of de-scrambling the payload of these
cells in order to restore the original content of the cell
payload. (Please note that this cell de-scrambler
presumes that the cell payload were scrambled via
the scrambling generating polynomial of x43 + 1.) This
option can be configured by writing a “1” to Bit 2 (De-
Scramble Enable) of the RxCP Configuration Register,
as depicted below.
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