XRT74L73 Datasheet, PDF (395/488 Pages) Exar Corporation – 3 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER

PRELIMINARY
XRT74L73
3 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER
REV. P1.0.1
frame to the XRT74L73 via the E3_Data_Out[2:0] (or
TxNib[2:0] pins).
Finally, for the Nibble-Parallel Mode operation, the
XRT74L73 will pulse the TxOHInd output pin “High”
for a total of 14 nibble periods (e.g., for the 7 over-
head bytes, within each of the E3, ITU-T G.832
frames). At the beginning of an E3 frame, the
XRT74L73 will pulse the TxOHInd output pin “High”
for 4 nibble periods. These four nibbles represent the
“FA1” and “FA2” bytes within each E3 frame.
Throughout the remainder of the E3 framing period,
the XRT74L73 will pulse the TxOHInd output pin 5
times. The width (or duration) of each of these pulses
will be two nibbles. Clearly, each of these 5 pulses
corresponds to the five remaining overhead bytes,
within the E3, ITU-T G.832 framing structure.
The behavior of the signals between the XRT74L73
and the Terminal Equipment for E3 Mode 4 Operation
is illustrated in Figure 171 .
FIGURE 171. BEHAVIOR OF THE TERMINAL INTERFACE SIGNALS BETWEEN THE XRT74L73 AND THE TERMINAL
EQUIPMENT (MODE 4 OPERATION)
Terminal Equipment Signals
RxOutClk
E3_Nib_Clock_In
E3_Data_Out[3:0]
Tx _Start_of_Frame
E3_Overhead_Ind
Payload Nibble [1059]
Overhead Nibble [0]
XRT74L73 Transmit Payload Data I/F Signals
RxOutClk
TxNibClk
TxNib [3:0]
TxNibFrame
Nibble [1059]
Overhead Nibble [0]
TxOH_Ind
Note: TxNibFrame pulses high to denote
E3 Frame Boundary.
E3 Frame Number N
E3 Frame Number N + 1
TxOH_Ind pulses high for 4 Nibble periods
How to configure the XRT74L73 into Mode 4
1. Set the NibIntf input pin "High".
2. Set the TimRefSel[1:0] bit-fields (within the
Framer Operating Mode Register) to "00" as illus-
trated below.
FRAMER OPERATING MODE REGISTER (ADDRESS = 0X00)
BIT 7
BIT 6
Local Loopback DS3/E3*
BIT 5
Internal LOS
Enable
BIT 4
RESET
BIT 3
BIT2
Interrupt Frame Format
Enable Reset
BIT 1
BIT 0
TimRefSel[1:0]
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
1
0
1
0
0
0
3. Interface the XRT74L73, to the Terminal Equip-
ment, as illustrated in Figure 170 .
396