XRT74L73 Datasheet, PDF (163/488 Pages) Exar Corporation – 3 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER

PRELIMINARY
XRT74L73
3 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER
REV. P1.0.1
The UNI can be configured to operate in one of these
two handshake modes by writing the appropriate data
UTOPIA Configuration Register: Address = 6Ah
BIT 7
BIT 6
Unused
R/W
BIT 5
Handshake
Mode
R/W
BIT 4
M-PHY
R/W
to Bit 5 (Handshake Mode) of the UTOPIA Configura-
tion Register, as depicted below.
BIT 3
CellOf52 Bytes
R/W
BIT 2
BIT 1
TFIFODepth[1, 0]
R/W
BIT 0
UtWidth16
R/W
The following table specifies the relationship between
this bit and the corresponding Handshaking Mode.
TABLE 30: THE RELATIONSHIP BETWEEN THE CONTENTS OF BIT 5 (HANDSHAKE MODE) WITHIN THE UTOPIA
CONFIGURATION REGISTER, AND THE RESULTING UTOPIA INTERFACE HANDSHAKE MODE
VALUE
0
1
RESULTING HANDSHAKE MODE
The UTOPIA Interfaces operate in the cell level handshake mode.
The UTOPIA Interfaces operate in the octet level handshake mode.
Note:
1. The Handshake Mode selection applies to both the
Transmit UTOPIA and Receive UTOPIA Interface
blocks.
2. Since Multi-PHY mode operation requires the use of
“Cell-Level” Handshaking; this bit is ignored if the UNI
is operating in the Multi-PHY mode.
3. Finally, the UNI will be operating in the “Cell-Level”
Handshaking Mode upon power up or reset. Therefore, a
“0” must be written to this bit in order to configure
“Octet- Level Handshaking, mode.
Figure 38 presents a timing diagram that illustrates the
behavior of various Receive UTOPIA Interface block sig-
nals when the Receive UTOPIA Interface block is operat-
ing in the “Cell Level” Handshake Mode.
FIGURE 38. TIMING DIAGRAM OF VARIOUS RECEIVE UTOPIA INTERFACE BLOCK SIGNALS, WHEN THE RECEIVE
UTOPIA INTERFACE BLOCK IS OPERATING IN THE “CELL LEVEL” HANDSHAKE MODE
1
2
3
4
5
6
7
8
9
31
32
34
RxUClk
RxUClav
RxUEn
RxUData [15:0] W24 W25
RxUSoC
W26
W0
W1 W2
W25 W26
Note: regarding Figure 39
1. The Receive UTOPIA Data bus is configured to be
16 bits wide. Hence, the data, which the Receive
UTOPIA places on the Receive UTOPIA Data bus,
is expressed in terms of 16 bit words: W0–W26.
2. The Receive UTOPIA Interface block is configured to
handle 54 bytes/cell. Hence, Figure 39 illustrates the
ATM Layer processor reading in 27 words (W0 through
W26) for each ATM cell.
In Figure 39 , the ATM Layer processor is just finishing up
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