XRT74L73 Datasheet, PDF (232/488 Pages) Exar Corporation – 3 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER

XRT74L73
3 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER
REV. P1.0.1
PRELIMINARY
• Assert the Interrupt Output pin (INT) by toggling it
"Low".
• Set Bit 0 (TxLAPD Interrupt Status) within the
TxDS3 LAPD Status and Interrupt Register, as
illustrated below.
TXDS3 LAPD STATUS AND INTERRUPT REGISTER (ADDRESS = 0X34)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
Not Used
TxDL Start TxDL Busy
RO
RO
RO
RO
R/W
RO
0
0
0
0
0
0
BIT 1
TxLAPD
Interrupt
Enable
R/W
0
BIT 0
TxLAPD
Interrupt
Status
RUR
1
The purpose of this interrupt is to alert the Microcon-
troller/MIcroprocessor that the LAPD Transmitter has
completed its transmission of a given LAPD (or PM-
DL) Message, and is now ready to transmit the next
PMDL Message, to the Remote Terminal Equipment.
4.3 THE RECEIVE SECTION OF THE XRT74L73 (DS3
MODE OPERATION)
When the XRT74L73 has been configured to operate
in the DS3 Mode, the Receive Section of the
XRT74L73 consists of the following functional blocks.
• Receive LIU Interface block
• Receive HDLC Controller block
• Receive DS3 Framer block
• Receive Overhead Data Output Interface block
• Receive Payload Data Output Interface block
Figure 79 presents a simple illustration of the Re-
ceive Section of the XRT74L73 Framer IC.
FIGURE 79. A SIMPLE ILLUSTRATION OF THE RECEIVE SECTION OF THE XRT74L73, WHEN IT HAS BEEN CONFIG-
URED TO OPERATE IN THE DS3 MODE
RxOHFrame
RxOHEnable
RxOH
RxOHClk
RxOHInd
RxSer
RxNib[2:0]
RxClk
RxFrame
Receive Overhead
Input
Interface Block
Receive Payload
Data Input
Interface Block
Receive DS3/E3
Framer Block
Receive LIU
Interface
Block
RxPOS
RxNEG
RxLineClk
From Microprocessor
Interface Block
RRxxDDSS33HHDDLLCC
CConontrtorlollelre/rB/Buufffefrer
Each of these functional blocks will be discussed in detail in this document.
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