XRT74L73 Datasheet, PDF (146/488 Pages) Exar Corporation – 3 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER

XRT74L73
3 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER
REV. P1.0.1
RxCP Idle Cell Pattern Header Byte-4 Register (Address = 53h)
BIT 7
R/W
0
BIT 6
R/W
0
BIT 5
R/W
0
BIT 4
R/W
0
BIT 3
R/W
0
BIT 2
R/W
0
PRELIMINARY
BIT 1
R/W
0
BIT 0
R/W
0
RxCP Idle Cell Mask Header—Byte 1 (Address = 54h)
BIT 7
R/W
1
BIT 6
R/W
1
BIT 5
R/W
1
BIT 4
BIT 3
RxIdle Cell Mask Header—Byte 1
R/W
R/W
1
1
BIT 2
R/W
1
BIT 1
R/W
1
BIT 0
R/W
1
RxCP Idle Cell Mask Header—Byte 2 (Address = 55h)
BIT 7
R/W
1
BIT 6
R/W
1
BIT 5
R/W
1
BIT 4
BIT 3
RxIdle Cell Mask Header—Byte 2
R/W
R/W
1
1
BIT 2
R/W
1
BIT 1
R/W
1
BIT 0
R/W
1
RxCP Idle Cell Mask Header—Byte 3 (Address = 56h)
BIT 7
R/W
1
BIT 6
R/W
1
BIT 5
R/W
1
BIT 4
BIT 3
RxIdle Cell Mask Header—Byte 3
R/W
R/W
1
1
BIT 2
R/W
1
BIT 1
R/W
1
BIT 0
R/W
1
RxCP Idle Cell Mask Header—Byte 4 (Address = 57h)
BIT 7
R/W
1
BIT 6
R/W
1
BIT 5
R/W
1
BIT 4
BIT 3
RxIdle Cell Mask Header—Byte 1
R/W
R/W
1
1
BIT 2
R/W
1
BIT 1
R/W
1
BIT 0
R/W
1
The user can periodically monitor the number of Idle
Cells that have been detected by the Receive Cell Pro-
cessor, by reading the PMON Received Idle Cell Count
Register (Addresses = 32h, 33h). The bit-format of
these registers are presented below.
PMON Received Idle Cell Count—MSB (Address = 32h)
BIT 7
RO
0
BIT 6
RO
0
BIT 5
RO
0
BIT 4
BIT 3
RxIdle Cell Count—High Byte
RO
RO
0
0
BIT 2
RO
0
BIT 1
RO
0
BIT 0
RO
0
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